/*
 * fml_PMIC.c
 *
 *  Created on: 2025年4月10日
 *      Author: 22332
 */

#include <stdio.h>
#include "cola_init.h"
#include "cola_os.h"
#include "cola_device.h"
#include "bsp_register_map.h"
#include "shell.h"
#include "fml_PMIC.h"
#include "fml_gpio.h"

extern void logWrite(const char *fmt, ...);

static cola_device_t *g_pDev_pmic_iic = NULL;

static bool ACK;

void fml_pmic_write_to_mtp(void)
{//Enable write data
	uint8_t address = 0xFF,value = 0x80;
	cola_delay_ms(2);
	ACK = cola_device_write(g_pDev_pmic_iic,address,&value,1);
	cola_delay_ms(500);
	if(ACK == 0)
		logWrite("MTP write error\r\n");
}

void fml_pmic_init(void)
{
    g_pDev_pmic_iic = cola_device_find("PMIC_IIC");
    fml_PAVDD_out_voltage(0x18);//6.2v
    cola_delay_ms(10);
    fml_NAVDD_out_voltage(0x18);//-6.2v
    cola_delay_ms(10);
    fml_VGH_out_voltage(0x06); //10v
    cola_delay_ms(10);
    fml_VGL_out_voltage(0x0C);//-9V
    cola_delay_ms(10);
    fml_SLEW_RATE_SETTING(0x55);
    cola_delay_ms(10);
    fml_NAVDD_ON_DELAY_time(0x04);
    cola_delay_ms(10);
    fml_VGH_ON_DELAY_time(0x02);
    cola_delay_ms(10);
    fml_VGH_SOFT_START_time(0x03);
    cola_delay_ms(10);
    fml_VGL_SOFT_START_time(0x00);
    cola_delay_ms(10);
    fml_PAVDD_ON_DELAY_time(0x02);
    cola_delay_ms(10);
    fml_PAVDD_off_Delay_Time(0x03);
    cola_delay_ms(10);
	fml_NAVDD_off_Delay_Time(0x01);
	cola_delay_ms(10);
	fml_set_option3(0x10);
//    fml_OPTION1_SETTING(0x02);
//    cola_delay_ms(10);
//    fml_OPTION3_SETTING(0x00);
//    cola_delay_ms(10);
//    fml_Channel_on_off_SETTING(0x3F);
//    cola_delay_ms(10);
//    fml_Auto_Refresh_SETTING(0x02);
    cola_delay_ms(10);
    fml_pmic_write_to_mtp();
}

uint8_t detect_power_fault()
{
    uint8_t address = FAULT_ANALYSIS,value=0x00;
    cola_device_read(g_pDev_pmic_iic,address,&value,1);
    return value;

}
/*
PAVDD Output Voltage Setting
0X00~0X2E: 5.00V~7.30V    unit:0.05V
*/
bool fml_PAVDD_out_voltage(uint8_t data)
{
    uint8_t address = PAVDD;
    ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);
    if(ACK == 0)
    	logWrite("PAVDD write error\r\n");
    return ACK;
}
/*
NAVDD Output Voltage Setting
0X00~0X2E: -5.00V~-7.30V  unit:0.05V
*/
void fml_NAVDD_out_voltage(uint8_t data)
{
    uint8_t address = NAVDD;
    ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);
    if(ACK == 0)
    	logWrite("NAVDD write error\r\n");
}
//0X00~0X2E: 7.00V~30.0V    unit:0.5V
void fml_VGH_out_voltage(uint8_t data)
{
    uint8_t address = VGH;
    ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);
    if(ACK == 0)
    	logWrite("VGH write error\r\n");

}
//0X00~0X30: -6.00V~-18.0V  unit:0.25V
void fml_VGL_out_voltage(uint8_t data)
{
    uint8_t address = VGL;
    ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);
    if(ACK == 0)
    	logWrite("VGL write error\r\n");
}
//0X00~0XFA: -3.00V~-2.00V  unit:20mV
void fml_VCOM_C_out_voltage(uint8_t data)
{
    uint8_t address = VCOM_C;
    ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);

}
//0X00~0X03: 2V~8V          unit:2V
void fml_VGH_LOW_TEMP_COMPENSATION_voltage(uint8_t data)
{
    uint8_t address = VGH_LOW_TEMP;
    ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);

}
//0X00：600KHZ      0x01:800KHZ     0x02:1MHZ   0x03:2.2MHZ
void fml_switching_frequency(uint8_t data)
{
    uint8_t address = SW_FREQ;
    ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);

}
/*
PAVDD Power-on Delay Time Setting
0x00~0x0F:0ms~75ms          unit:5ms
*/
void fml_PAVDD_ON_DELAY_time(uint8_t data)
{
    uint8_t address = PAVDD_ON_DELAY;
    ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);

}
/*
PAVDD Soft-start time Setting
0x00~0x07:5ms~40ms          unit:5ms
*/
void fml_PAVDD_SOFT_START_time(uint8_t data)
{
    uint8_t address = PAVDD_SOFT_START;
    ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);

}
/*
VGL Power-on Delay Time Setting
0x00~0x0F:0ms~75ms          unit:5ms
*/
void fml_VGL_ON_DELAY_time(uint8_t data)
{
    uint8_t address = VGL_ON_DELAY;
    ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);

}
/*
VGL Soft-start time Setting
0x00~0x07:3ms~24ms          unit:3ms
*/
void fml_VGL_SOFT_START_time(uint8_t data)
{
    uint8_t address = VGL_SOFT_START;
    ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);

}
/*
VGH Power-on Delay Time Setting
0x00~0x0F:0ms~75ms          unit:5ms
*/
void fml_VGH_ON_DELAY_time(uint8_t data)
{
    uint8_t address = VGH_ON_DELAY;
    ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);

}
/*
VGH Soft-start time Setting
0x00~0x03:5ms~20ms          unit:5ms
*/
void fml_VGH_SOFT_START_time(uint8_t data)
{
    uint8_t address = VGH_SOFT_START;
    ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);

}
/*
NAVDD Power-on Delay Time Setting
0x00~0x0F:0ms~75ms          unit:5ms
*/
void fml_NAVDD_ON_DELAY_time(uint8_t data)
{
    uint8_t address = NAVDD_ON_DELAY;
    ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);

}
/*
NAVDD Soft-start time Setting
0x00~0x07:5ms~40ms          unit:5ms
*/
void fml_NAVDD_SOFT_START_time(uint8_t data)
{
    uint8_t address = NAVDD_SOFT_START;
    ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);

}
/*
VCOM Power-on Delay Time Setting
0x00~0x0F:0ms~75ms          unit:5ms
*/
void fml_VCOM_ON_DELAY_time(uint8_t data)
{
    uint8_t address = VCOM_ON_DELAY;
    ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);

}
/*
RESET Power-on Delay Time Setting
0x00~0x0F:0ms~75ms          unit:5ms
*/
void fml_RESET_ON_DELAY_time(uint8_t data)
{
    uint8_t address = RESET_ON_DELAY;
    ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);

}
/*
Power-off Delay Time Setting
0x00~0x0F:0ms~45ms          unit:3ms
*/
void fml_POWER_OFF_DELAY_time(uint8_t data)
{
    uint8_t address = POWER_OFF_DELAY;
    ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);

}
/*
OPTION1:
    RESET goes low following power-off delay time or VGH channel turn off[7]
    0:power-off delay   1：VGH channel turn off
    The voltage detector monitors the VIN voltage to
    generate a RESET signal from RESET pin while VIN is
    lower than the detecting level
        detecting level:[6:5]
        0x00：UVLO Falling     0x01：2.1V     0x02：2.4V     0x03：2.7V
    Discharge Function：
        PAVDD Discharge Function:[4]
        NAVDD Discharge Function:[3]
        VGH Discharge Function:[2]
        VGL Discharge Function:[1]
        VCOM Discharge Function:[0]
        0：ON   1：OFF
*/
void fml_OPTION1_SETTING(uint8_t data)
{
    uint8_t address = OPTION1;
       ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);

}
/*
OPTION2:
    PAVDD Slew Rate Setting:[7:6]
    NAVDD Slew Rate Setting:[5:4]
    VGL Slew Rate Setting:[3:2]
    VGH Slew Rate Setting:[1:0]
    0x00:Fast   0x01:Normal    0x02:Slow   0x03:Slowest
*/
void fml_SLEW_RATE_SETTING(uint8_t data)
{
    uint8_t address = OPTION2;
       ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);

}
/*
OPTION3:
    VGL Internal/External Option[5]
    0：internal     1:external
    frequency spread：[4:3]
    0x00：off    0x01:3%    0x02:6%
    Over Temperature Protection (OTP):[2]
    Under Voltage Protection (UVP)：[1]
    Short Circuit Protection (SCP):[0]
    0:ON    1:OFF
*/
void fml_OPTION3_SETTING(uint8_t data)
{
    uint8_t address = OPTION3;
    ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);

}
/*
Channel ON/OFF Option:
    RESET EN:[5]
    VCOM EN:[5]
    NAVDD EN:[5]
    VGH EN:[5]
    VGL EN:[5]
    PAVDD EN:[5]
    0：OFF      1: ON
*/
void fml_Channel_on_off_SETTING(uint8_t data)
{
    uint8_t address = CHANNEL_ON_OFF_OPTION;
    ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);

}
/*
Auto Refresh Functions：
    registers code auto recovery function if the registers code is changed abnormally

    Auto Refresh Enable:[0]
    0:off   1:on
    Refreshing Time:[2:1]
    0x00:0.25s      0x01:0.5s     0x02:0.75s     0x03:1s
    FAULT Behavior:[3]
    0：Fault pin not output low      1：Fault pin  output low
*/
void fml_Auto_Refresh_SETTING(uint8_t data)
{
    uint8_t address = AUTO_REFRESH_OPTION;
    ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);

}
/*
PAVDD Off Delay Time[2:0]
0x00~0x07:0ms~14ms          unit:2ms
*/
void fml_PAVDD_off_Delay_Time(uint8_t data)
{
    uint8_t address = PAVDD_OFF_DELAY;
    ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);

}


/*
NAVDD Off Delay Time[2:0]
0x00~0x07:0ms~14ms          unit:2ms
*/
void fml_NAVDD_off_Delay_Time(uint8_t data)
{
    uint8_t address = NAVDD_OFF_DELAY;
    ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);

}
/*
VGH Off Delay Time[2:0]
0x00~0x07:0ms~14ms          unit:2ms
*/
void fml_VGH_off_Delay_Time(uint8_t data)
{
    uint8_t address = VGH_OFF_DELAY;
    ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);

}
/*
VGL Off Delay Time[2:0]
0x00~0x07:0ms~14ms          unit:2ms
*/
void fml_VGL_off_Delay_Time(uint8_t data)
{
    uint8_t address = VGL_OFF_DELAY;
    ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);

}
/*
FAULT Analysis Clear Option[3]
0:Not Clear     1:Clear
VCOM Off Delay Time[2:0]
0x00~0x07:0ms~14ms          unit:2ms
*/
void fml_FAULT_VCOM_off_Delay_Time(uint8_t data)
{
    uint8_t address = FAULT_VCOM;
    ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);

}

void fml_set_option3(uint8_t data)
{
    uint8_t address = OPTION3;
    ACK = cola_device_write(g_pDev_pmic_iic,address,&data,1);

}

